A photonic integrated circuit or integrated optical circuit is a device that may integrate a plurality of optical components that allow information signals to be received, transmitted or processed, where the information signals are carried over optical wavelengths. In addition to optical components, integrated optical circuits may also include electrical components that receive, transmit, and process electrical signals. The integrated optical circuits may communicate via optical cables, and such types of communications and connections may be referred to as optical interconnect. Systems that implement optical interconnect may be referred to as optical interconnect systems.
A socket is device that allows easy insertion and placement of chips comprising integrated circuits, on a printed circuit board. A socket may comprise a physical connector that accepts the chip. Sockets are an integral part of high-volume manufacturing (HVM) test methodology for semiconductor components, and may be used to validate functional and static reliability of the electrical and mechanical interfaces between a device under test (DUT) and a test interface unit (TIU). The DUT is comprised of the chip (i.e., an integrated circuit) including optical and electrical elements on the chip.
The usage of optical interconnect systems and applications has been increasing over time, in order to address the bandwidth limitations of copper-based high-speed electrical systems. As a result there is the need to define a suitable HVM test methodology with a suitable optical socket. The electrical and mechanical requirements of an optical socket may need to be designed to support electrical and optically-modulated data rates that may extend beyond 25 gigabits per second channel. In addition, the alignment schemes of the DUT to the optical socket may need to ensure that the optical coupling reduces optical reflections caused by refraction index changes between a light source and the coupling lens system. The optical socket may need proper thermal dissipation with an effective clamp design to contact the DUT and minimize adverse thermal effects from influencing the peak optical power and jitter components measured from the DUT during HVM testing.